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general description the max4717/max4718 low-voltage, low on-resistance (r on ), dual single-pole/double throw (spdt) analog switches operate from a single +1.8v to +5.5v supply. these devices are designed for usb 1.1 and audio switching applications. the max4717 features two 4.5 ? r on (max) spdt switches with 1.2 ? flatness and 0.3 ? matching between channels. the max4718 features one 4.5 ? r on (max) spdt switch and one 20 ? r on (max) spdt switch. the 20 ? switch has a guaranteed matching and flatness of 0.4 ? and 1.2 ? , respectively. these switches offer break- before-make switching (1ns) with t on <80ns and t off <40ns at +2.7v. the digital logic inputs are +1.8v logic compatible with a +2.7v to +3.6v supply. these switches are packaged in a chip-scale package (ucsp), significantly reducing the required pc board area. the chip occupies only a 2.0mm ? 1.50mm area and has a 4 ? 3 bump array with a bump pitch of 0.5mm. these switches are also available in 10-pin ?ax and 10-pin tdfn packages. applications usb 1.1 signal switching circuits battery-operated equipment audio/video-signal routing headphone switching low-voltage data-acquisition systems sample-and-hold circuits cell phones pdas features ? usb 1.1 signal switching compliant ? 2ns (max) differential skew ? -3db bandwidth: >300mhz ? low 15pf on-channel capacitance ? single-supply operation from +1.8v to +5.5v ? 4.5 ? r on (max) switches (max4717/max4718) 0.3 ? (max) r on match (+3.0v supply) 1.2 ? (max) flatness (+3.0v supply) ? 20 ? r on (max) switch (max4718) 0.4 ? (max) r on match (+3.0v supply) 1.2 ? (max) flatness (+3.0v supply) ? rail-to-rail signal handling ? high off-isolation: -55db (10mhz) ? low crosstalk: -80db (10mhz) ? low distortion: 0.03% ? +1.8v cmos-logic compatible ? <0.5na leakage current at +25? max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp ________________________________________________________________ maxim integrated products 1 ordering information 19-2627; rev 1; 6/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. part temp range pin/bump- package top mark max4717 eub -40? to +85? 10 ?ax max4717etb -40? to +85? 10 tdfn-ep** acv max4717ebc-t* -40? to +85? 12 ucsp-12 abh max4718 eub -40? to +85? 10 ?ax max4718etb -40? to +85? 10 tdfn-ep** acw max4718ebc-t* -40? to +85? 12 ucsp-12 abi com2 com1 no2 no1 nc2 in2 in1 nc1 gnd v+ in_ 0 1 no_ max4717/max4718 off on nc_ on switches shown for logic "0" input off part max4717 max4718 spdt1 4.5 ? 4.5 ? 4.5 ? 20 ? spdt2 ucsp max4717/max4718 max4717/max4718 nc2 in1 gnd nc1 2 3 9 8 com2 in2 com1 no1 1 10 no2 v+ 4 5 7 6 max c1 c2 c3 c4 b4 a4 a3 a2 a1 b1 top view (bump side down) com1 in1 nc1 no1 v+ tdfn max4717/max4718 in2 nc2 gnd com2 no2 1 2 3 4 5 10 9 8 7 6 pin configurations/functional diagrams/truth tables ucsp is a trademark of maxim integrated products, inc. ?ax is a registered trademark of maxim integrated products, inc. * ucsp reliability is integrally linked to the user? assembly methods, circuit board material, and environment. see the ucsp reliability notice in the ucsp reliability section of this data sheet for more information. ** ep = exposed paddle.
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics?ingle +3v supply (v+ = +2.7v to +3.6v, v ih = +1.4v, v il = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +3.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. (all voltages referenced to gnd) v+, in_...................................................................-0.3v to +6.0v com_, no_, nc_ (note 1) ...........................-0.3v to (v+ + 0.3v) continuous current com_, no_, nc_ ...........................?00ma peak current com_, no_, nc_ (pulsed at 1ms, 10% duty cycle)................................?00ma continuous power dissipation (t a = +70?) 10-pin ?ax (derate 5.6mw/? above +70?) ...........444mw 10-pin tdfn (derate 24.4mw/? above +70?) .......1951mw 12-bump ucsp (derate 11.4mw/? above +70?) ....909mw esd method 3015.7 .............................................................>2kv operating temperature range ...........................-40? to +85? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? bump temperature (soldering) (note 2) infrared (15s) ...............................................................+220? vapor phase (60s) .......................................................+215? note 1: signals on com_, no_, or nc_ exceeding v+ or gnd are clamped by internal diodes. limit forward-diode current to maxi- mum current rating. note 2: this device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. this limit permits only the use of the solder profiles recom- mended in the industry standard specification, jedec 020a, paragraph 7.6, table 3 for ir/vpr and convection reflow. preheating is required. hand or wave soldering is not allowed. parameter symbol conditions t a min typ max units analog signal range v com_ , v no_ , v nc_ t min to t max 0v+v analog switch (low r on ?ax4717/max4718 spdt 1) +25? 3.0 4.5 on-resistance (note 5) r on v+ = 2.7v, i com_ = 10ma; v no_ or v nc_ = 1.5v t min to t max 5 ? ? r on v+ = 2.7v, i com_ = 10ma; v no_ or v nc_ = 1.5v t min to t max 0.4 ? ? analog switch (high r on ?ax4718 spdt 2) +25? 15 20 on-resistance (note 5) r on v+ = 2.7v, i com_ = 10ma; v no_ or v nc_ = 1.5v t min to t max 25 ?
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp _______________________________________________________________________________________ 3 electrical characteristics?ingle +3v supply (continued) (v+ = +2.7v to +3.6v, v ih = +1.4v, v il = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +3.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units +25? 0.15 0.4 on-resistance match between channels (notes 5, 6) ? r on v+ = 2.7v, i com_ = 10ma; v no_ or v nc_ = 1.5v t min to t max 0.5 ? ? dynamic characteristics +25? 40 80 turn-on time t on v no_ , v nc_ = 1.5v; r l = 300 ? , c l = 35pf, figure 1; v ih = 1.5v, v il = 0v t min to t max 100 ns +25? 20 40 turn-off time t off v no_ , v nc_ = 1.5v; r l = 300 ? , c l = 35pf, figure 1; v ih = 1.5v, v il = 0v t min to t max 50 ns +25? 8 break-before-make time delay (note 8) t bbm v no_ , v nc_ = 1.5v; r l = 300 ? , c l = 35pf, figure 2 t min to t max 1 ns skew (note 8) t skew r s = 39 ? , c l = 50pf, figure 3 t min to t max 0.15 2ns charge injection q v gen = 1.5v, r gen = 0 ? , c l = 1.0nf, figure 4 +25? 5pc f = 10mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5 -55 off-isolation v iso f = 1mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5 +25? -80 db f = 10mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5 -80 crosstalk (note 9) v ct f = 1mhz; v no_ , v nc_ = 1v p-p ; r l = 50 ? , c l = 5pf, figure 5 +25? -110 db on-channel -3db bandwidth bw signal = 0dbm, r l = 50 ? , c l = 5pf, figure 5 +25? >300 mhz total harmonic distortion thd v com = 2v p-p , r l = 600 ?
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp 4 _______________________________________________________________________________________ electrical characteristics?ingle +3v supply (continued) (v+ = +2.7v to +3.6v, v ih = +1.4v, v il = +0.5v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +3.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units switch on-capacitance c (on) f = 1mhz, figure 6 +25? 15 pf digital i/o input logic high voltage v ih t min to t max 1.4 v input logic low voltage v il t min to t max 0.5 v input leakage current i in v+ = +3.6v, v in_ = 0 or 5.5v t min to t max -100 +100 na power supply power-supply range v+ t min to t max 1.8 5.5 v supply current i+ v+ = +5.5v, v in_ = 0v or v+ t min to t max 1a electrical characteristics?ingle +5v supply (v+ = +4.2v to +5.5v, v ih = +2.0v, v il = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +5.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units analog signal range v com_ , v no_ , v nc_ t min to t max 0v+v analog switch (low r on ?ax4717/max4718 spdt 1) +25? 1.7 3 on-resistance (note 5) r on v+ = 4.2v, i com_ = 10ma; v no_ or v nc_ = 3.5v t min to t max 3.5 ? ? r on v+ = 4.2v, i com_ = 10ma; v no_ or v nc_ = 3.5v t min to t max 0.4 ? ?
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp _______________________________________________________________________________________ 5 electrical characteristics?ingle +5v supply (continued) (v+ = +4.2v to +5.5v, v ih = +2.0v, v il = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +5.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units analog switch (high r on ?ax4718 spdt 2) +25? 12 20 on-resistance (note 5) r on v+ = 4.2v, i com_ = 10ma; v no_ or v nc_ = 3.5v t min to t max 25 ? ? r on v+ = 4.2v, i com_ = 10ma; v no_ or v nc_ = 3.5v t min to t max 0.5 ? ? dynamic characteristics +25? 30 80 turn-on time t on v no_ , v nc_ = 3.0v; r l = 300 ? , c l = 35pf, figure 1 t min to t max 100 ns +25? 20 40 turn-off time t off v no_ , v nc_ = 3.0v; r l = 300 ? , c l = 35pf, figure 1 t min to t max 50 ns +25? 8 break-before-make time delay (note 8) t bbm v no_ , v nc_ = 3.0v; r l = 300 ? , c l = 35pf, figure 2 t min to t max 1 ns skew (note 8) t skew r s = 39 ? , c l = 50pf, figure 3 t min to t max 0.15 2ns digital i/o input logic high voltage v ih t min to t max 2.0 v input logic low voltage v il t min to t max 0.8 v input leakage current i in v+ = 5.5v, v in _ = 0v or v+ t min to t max -100 +100 na
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp 6 _______________________________________________________________________________________ note 3: ucsp and tdfn parts are 100% tested at +25? only, and guaranteed by design over the specified temperature range. ?ax parts are 100% tested at t max and guaranteed by design over the specified temperature range. note 4: the algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive value is a maximum. note 5: guaranteed by design for ucsp and tdfn parts. note 6: ? r on = r on(max) - r on(min) . note 7: flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. note 8: guaranteed by design. note 9: between any two switches. electrical characteristics?ingle +5v supply (continued) (v+ = +4.2v to +5.5v, v ih = +2.0v, v il = +0.8v, t a = t min to t max , unless otherwise noted. typical values are at v+ = +5.0v, t a = +25?, unless otherwise noted.) (notes 3, 4) parameter symbol conditions t a min typ max units power supply power-supply range v+ t min to t max 1.8 5.5 v supply current i+ v+ = 5.5v, v in_ = 0v or v+ t min to t max 1a on-resistance vs. v com max4717/18 toc01 v com (v) r on ( ? ) 4 3 2 1 2 4 6 8 10 0 05 v+ = 1.8v v+ = 2.5v v+ = 3v v+ = 4.2v v+ = 5v low r on switch on-resistance vs. v com max4717/18 toc02 v com (v) r on ( ? ) 2.5 2.0 1.5 1.0 0.5 2 3 4 5 6 1 03.0 t a = +85 c t a = +25 c t a = -40 c v+ = 3v low r on switch on-resistance vs. v com max4717/18 toc03 v com (v) r on ( ? ) 4 3 2 1 1 2 3 4 5 0 05 v+ = 5v t a = +85 c t a = -40 c t a = +25 c low r on switch t ypical operating characteristics (t a = +25?, unless otherwise noted.)
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp _______________________________________________________________________________________ 7 on-resistance vs. v com max4717/18 toc04 v com (v) r on ( ? ) 4 3 2 1 12 14 16 18 20 10 05 v+ = 1.8v v+ = 2.5v v+ = 4.2v v+ = 5v high r on switch on-resistance vs. v com max4717/18 toc05 v com (v) r on ( ? ) 2.5 2.0 1.5 1.0 0.5 11 12 13 14 15 10 03.0 t a = +85 c t a = +25 c t a = -40 c v+ = 3v high r on switch on-resistance vs. v com max4717/18 toc06 v com (v) r on ( ? ) 4 3 2 1 11 12 13 14 15 10 05 v+ = 5v t a = +85 c t a = -40 c t a = +25 c high r on switch leakage current vs. temperature max4717/18 toc07 temperature ( c) leakage current (pa) 60 35 10 -15 100 200 300 400 500 0 -40 85 v+ = 3v low r on switch com on-leakage com off-leakage leakage current vs. temperature max4717/18 toc08 temperature ( c) leakage current (pa) 60 35 10 -15 200 400 600 800 1000 0 -40 85 v+ = 5v low r on switch com on-leakage com off-leakage leakage current vs. temperature max4717/18 toc09 temperature ( c) leakage current (pa) 60 35 10 -15 100 300 500 700 -100 -40 85 v+ = 3v high r on switch com on-leakage com off-leakage leakage current vs. temperature max4717/18 toc10 temperature ( c) leakage current (pa) 60 35 10 -15 100 300 500 700 900 -100 -40 85 v+ = 5v high r on switch com on-leakage com off-leakage charge injection vs. v com max4717/18 toc11 v com (v) charge injection (pc) 4 3 2 1 10 20 30 40 50 0 05 c l = 1nf v+ = 5v c l = 1nf v+ = 3v supply current vs. temperature max4717/18 toc12 temperature ( c) supply current (na) 60 35 10 -15 1 2 3 4 5 6 0 -40 85 v+ = 5v v+ = 3v t ypical operating characteristics (continued) (t a = +25?, unless otherwise noted.)
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp 8 _______________________________________________________________________________________ supply current vs. logic level max4717/18 toc13 logic level (v) supply current ( a) 4 3 2 1 20 40 60 80 100 0 05 v+ = 5v v+ = 3v logic threshold vs. supply voltage max4717/18 toc14 supply voltage (v) logic threshold (v) 5.0 4.5 4.0 3.5 3.0 2.5 2.0 0.4 0.8 1.2 1.6 2.0 0 1.5 5.5 v th+ v th- turn-on/off time vs. supply voltage max4717/18 toc15 supply voltage (v) t on /t off (ns) 4.5 3.5 2.5 20 40 60 80 100 0 1.5 5.5 low r on switch t on t off turn-on/off time vs. supply voltage max4717/18 toc16 supply voltage (v) t on /t off (ns) 4.5 3.5 2.5 20 40 60 80 100 0 1.5 5.5 high r on switch t on t off turn-on/off time vs. temperature max4717/18 toc17 temperature ( c) t on /t off (ns) 60 35 10 -15 10 20 40 30 50 60 0 -40 85 low r on switch t on , v+ = 3.0v t on , v+ = 5.0v t off , v+ = 3.0v t off , v+ = 5.0v turn-on/off time vs. temperature max4717/18 toc18 temperature ( c) t on /t off (ns) 60 35 10 -15 10 20 30 40 50 60 0 -40 85 high r on switch t on , v+ = 3.0v t on , v+ = 5.0v t off , v+ = 3.0v t off , v+ = 5.0v rise/fall-time delay vs. supply voltage max4717/18 toc19 supply voltage (v) output rise/fall-time delay (ps) 4.5 3.5 2.5 0.5 1.0 1.5 2.0 2.5 3.0 0 1.5 5.5 input rise/fall time = 15ns figure 4, c l = 50pf low r on switch rise delay fall delay rise/fall-time delay vs. temperature max4717/18 toc20 temperature ( c) output rise/fall-time delay (ns) 60 35 10 -15 0.5 1.0 1.5 2.0 0 -40 85 input rise/fall time = 15ns figure 4, c l = 50pf v+ = 4.2v low r on switch rise delay fall delay rise time to fall time mismatch vs. supply voltage max4717/18 toc21 supply voltage (v) mismatch (ps) 4.5 3.5 2.5 100 200 300 400 0 1.5 5.5 input rise/fall time = 15ns figure 4, c l = 50pf low r on switch t ypical operating characteristics (continued) (t a = +25?, unless otherwise noted.)
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp _______________________________________________________________________________________ 9 rise time to fall time mismatch vs. temperature max4717/18 toc22 temperature ( c) mismatch (ps) 60 35 10 -15 50 100 150 200 0 -40 85 input rise/fall time = 15ns figure 4, c l = 50pf v+ = 4.2v low r on switch skew vs. supply voltage max4717/18 toc23 supply voltage (v) skew (ps) 4.5 3.5 2.5 100 200 300 400 0 1.5 5.5 input rise/fall time = 15ns figure 4, c l = 50pf max4717 only skew vs. temperature max4717/18 toc24 temperature ( c) skew (ps) 60 35 10 -15 50 100 150 200 0 -40 85 input rise/fall time = 15ns figure 4, c l = 50pf v+ = 4.2v max4717 only frequency response max4717/18 toc25 frequency (mhz) on-loss (db) 1 0.01 -120 -100 -80 -60 -40 -20 0 20 -140 0.0001 100 v+ = 3v/5v low r on switch on-loss off-isolation crosstalk frequency response max4717/18 toc26 frequency (mhz) on-loss (db) 1 0.01 -120 -100 -80 -60 -40 -20 0 20 -140 0.0001 100 v+ = 3v/5v high r on switch on-loss off-isolation crosstalk total harmonic distortion vs. frequency max4717/18 toc27 frequency (hz) thd (%) 10k 1k 100 0.1 10 100k 1 0.01 v+ = 3v low r on switch r l = 600 ? total harmonic distortion vs. frequency max4717/18 toc28 frequency (hz) thd (%) 10k 1k 100 0.1 10 100k 1 0.01 v+ = 3v high r on switch r l = 600 ? t ypical operating characteristics (continued) (t a = +25?, unless otherwise noted.)
max4717/max4718 detailed description the max4717/max4718 high-speed, low-voltage, low on- resistance (r on ), dual spdt analog switches operate from a single +1.8v to +5.5v supply. the switches feature break-before-make switching operation and fast switch- ing speeds (t on = 80ns (max), t off = 40ns (max)). these switches have low 15pf on-channel capaci- tance, which allows for 12mbps switching of the data signals for usb 1.0/1.1 applications. the max4717 is designed to switch d+ and d- usb signals with a guar- anteed skew of less than 2ns (see figure 4) as mea- sured from 50% of the input signal to 50% of the output signal. applications information digital control inputs the max4717/max4718 logic inputs accept up to +5.5v regardless of supply voltage. for example, with a +3.3v supply, in_ can be driven low to gnd and high to +5.5v allowing for mixing of logic levels in a system. driving the control logic inputs rail-to-rail minimizes power consumption. for a +3v supply voltage, the logic thresholds are 0.5v (low) and 1.4v (high); for a +5v supply voltage, the logic thresholds are 0.8v (low) and 2.0v (high). analog signal levels the on-resistance of the max4717/max4718 changes very little for analog input signals across the entire supply voltage range (see the typical operating characteristics ). the switches are bidirectional, so the no_, nc_, and com_ pins can be either inputs or outputs. power-supply sequencing and overvoltage protection caution: do not exceed the absolute maximum rat- ings because stresses beyond the listed ratings may cause permanent damage to the device. proper power-supply sequencing is recommended for all cmos devices. always apply v+ before applying analog signals, especially if the analog signal is not current-limited. ucsp application information for the latest application details on ucsp construction, dimensions, tape carrier information, printed circuit board techniques, bump-pad layout, and recommend- ed reflow temperature profile as well as the latest infor- mation on reliability testing results, go to the maxim web site at www.maxim-ic.com/ucsp to find the application note: uscp a wafer-level chip-scale package . chip information transistor count: 235 process: bicmos 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp 10 ______________________________________________________________________________________ pin ucsp ?ax/ tdfn name function a1 7 nc2 analog switch 2?ormally closed terminal a2 8 in2 analog switch 2?igital control input a3 9 com2 analog switch 2?ommon terminal a4 10 no2 analog switch 2?ormally open terminal b1 6 gnd ground. connection. b4 1 v+ positive-supply voltage c1 5 nc1 analog switch 1?ormally closed terminal c2 4 in1 analog switch 1?igital control input c3 3 com1 analog switch 1?ommon terminal c4 2 no1 analog switch 1?ormally open terminal ep exposed pad (for tdfn package only). connect to ground. pin description
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp ______________________________________________________________________________________ 11 t est circuits/timing diagrams t r < 5ns t f < 5ns 50% v il logic input r l com_ gnd in_ c l includes fixture and stray capacitance. v out = v n_ ( r l ) r l + r on v n_ v ih t off 0v no_ or nc_ 0.9 x v 0ut 0.9 x v out t on v out switch output logic input in depends on switch configuration; input polarity determined by sense of switch. v+ c l v+ v out max4717/ max4718 figure 1. switching time 50% v ih v il logic input v out 0.9 x v out t bbm logic input r l 300 ? gnd c l includes fixture and stray capacitance. no_ in_ nc_ v out v+ v+ c l 35pf v n_ com_ max4717/ max4718 figure 2. break-before-make interval
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp 12 ______________________________________________________________________________________ in+ in- in1 in2 c l c l out+ out- v in+ v in- v out+ v out- nc1 or no1 nc2 or no2 com1 com2 0v v+ 0v v+ 0v v+ 0v v+ t skew t infall t inrise t outfall t outrise rise time delay = |t inrise - t outrise | f all time delay = |t infall - t outfall | rise time to fall time mismatch = |t outfall - t outrise | 50% 50% 50% 50% 90% 10% 90% 10% 90% 10% 90% 10% max4717 r s r s v il to v ih figure 3. output signal skew t est circuits/timing diagrams (continued)
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp ______________________________________________________________________________________ 13 v gen gnd com_ c l v out v+ v out in off on off ? v out q = ( ? v out )(c l ) nc_ logic input waveforms inverted for switches that have the opposite logic sense. off on off in v il to v ih v+ r gen in_ max4717/ max4718 or no_ figure 4. charge injection measurements are standardized against shorts at ic terminals. off-isolation is measured between com_ and "off" no_ or nc_ terminal on each switch. on-loss is measured between com_ and "on" no_ or nc_ terminal on each switch. crosstalk is measured from one channel to the other channel. signal direction through switch is reversed; worst values are recorded. +5v v out v+ in_ nc1 com1 no1* v in max4717/ max4718 off-isolation = 20log v out v in on-loss = 20log v out v in crosstalk = 20log v out v in network analyzer 50 ? 50 ? 50 ? 50 ? meas ref 10nf 0v or v+ 50 ? gnd *for crosstalk this pin is no2. nc2 and com2 are open. figure 5. on-loss, off-isolation, and crosstalk capacitance meter nc_ or no_ com_ gnd in v il or v ih 10nf v+ f = 1mhz v+ max4717/ max4718 figure 6. channel off/on-capacitance t est circuits/timing diagrams (continued)
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp 14 ______________________________________________________________________________________ 12l, ucsp 4x3.eps f 1 1 21-0104 package outline, 4x3 ucsp pa cka ge information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .)
max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp ______________________________________________________________________________________ 15 10lumax.eps package outline, 10l umax/usop 1 1 21-0061 i rev. document control no. approval proprietary information title: top view front view 1 0.498 ref 0.0196 ref s 6 side view bottom view 0 0 6 0.037 ref 0.0078 max 0.006 0.043 0.118 0.120 0.199 0.0275 0.118 0.0106 0.120 0.0197 bsc inches 1 10 l1 0.0035 0.007 e c b 0.187 0.0157 0.114 h l e2 dim 0.116 0.114 0.116 0.002 d2 e1 a1 d1 min - a 0.940 ref 0.500 bsc 0.090 0.177 4.75 2.89 0.40 0.200 0.270 5.05 0.70 3.00 millimeters 0.05 2.89 2.95 2.95 - min 3.00 3.05 0.15 3.05 max 1.10 10 0.60.1 0.60.1 0 0.500.1 h 4x s e d2 d1 b a2 a e2 e1 l l1 c gage plane a2 0.030 0.037 0.75 0.95 a1 package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .)
package information (continued) (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation go to www.maxim-ic.com/packages .) max4717/max4718 4.5 ? /20 ? , 300mhz bandwidth, dual spdt analog switches in ucsp maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. 6, 8, &10l, dfn thin.eps l c l c pin 1 index area d e l e l a e number of leads shown are for reference only e2 detail a n f 1 2 21-0137 package outline, 6, 8, 10 & 14l, tdfn, exposed pad, 3x3x0.80 mm common dimensions symbol min. max. a0.700 .80 d2.903 .10 e2.903 .10 a1 0.00 0.05 l 0.20 0.40 pkg. code n d2 e2 e jedec spec b [(n/2)-1] x e package variations 0.25 min. k a2 0.20 ref. 2.300.10 1.500.10 6 t633-1 0.95 bsc mo229 / weea 1.90 ref f 2 2 21-0137 package outline, 6, 8, 10 & 14l, tdfn, exposed pad, 3x3x0.80 mm 0.400.05 1.95 ref 0.300.05 0.65 bsc 2.300.10 8 t833-1 2.00 ref 0.250.05 0.50 bsc 2.300.10 10 t1033-1 2.40 ref 0.200.03 - - - - 0.40 bsc 1.700.10 2.300.10 14 t1433-1 1.500.10 1.500.10 mo229 / weec mo229 / weed-3 0.40 bsc - - - - 0.200.03 2.40 ref t1433-2 14 2.300.10 1.700.10

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